Design of High-Speed Communication Circuits by Ramesh Harjani

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By Ramesh Harjani

MOS expertise has quickly turn into the de facto commonplace for mixed-signal built-in circuit layout end result of the excessive degrees of integration attainable as machine geometries lessen to nanometer scales. The relief in characteristic measurement signifies that the variety of transistor and clock speeds have elevated considerably. actually, present day microprocessors include hundreds of thousands of hundreds of thousands of transistors working at a number of gigahertz. in addition, this aid in characteristic dimension additionally has an important impression on mixed-signal circuits. as a result of the better degrees of integration, nearly all of ASICs possesses a few analog parts. It has now develop into approximately necessary to combine either analog and electronic circuits at the comparable substrate because of price and gear constraints. This booklet offers many of the more moderen difficulties and possibilities provided via the small gadget geometries and the excessive degrees of integration that's now attainable. the purpose of this ebook is to summarize essentially the most severe elements of high-speed analog/RF communications circuits. realization is concentrated at the influence of scaling, substrate noise, facts converters, RF and instant communique circuits and wireline verbal exchange circuits, together with high-speed I/O.

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This level is encoded as a binary equivalent through a combinational logic which we assume here to be composed of OR gates. 34 Self-Induced Noise in Integrated Circuits 289 Fig. 7. 4. Assumptions regarding switching mechanisms and physical media A signal change at the input in a circuit such as the above can be mapped deterministically to the number of gates that switch or change logic states. This is similar to estimating the dependence of quantization noise in a linear quantizer31. In order to facilitate the following analysis, we make certain assumptions regarding the type of switching currents and the substrate contacts on-chip.

Currents injected into the bulk traverse varied paths, depending on the material constants such as bulk resisitivity and dimensions and also on specific boundary conditions set by the devices and contacts on the surface. In the following section we will discuss techniques to analyze and model this current flow. 3. Extraction of Substrate Parasitics Two classes of techniques have been used for extracting substrate models. One set of techniques use numerical approaches12'13,14'15 such as the finite-differences method.

2 (2005) 277-295 %%B_ f | C World Scientific s-~, \IT u c. com SELF-INDUCED NOISE IN INTEGRATED CIRCUITS RANJIT GHARPUREY Department of Electrical Engineering and Computer Science, University of Michigan 1301 Beal Avenue, Ann Arbor, Michigan 48109, United States of America ranjitg@eecs. umich. edu Circuits with diverse electrical behavior are often placed in close physical proximity in order to achieve high-levels of on-chip integration. The activity of certain types of circuits can generate harmful interference, and degrade the performance of the system through electromagnetic coupling.

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